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RT8803A
2/3-Phase PWM Controller for High-Density Power Supply
General Description
The RT8803A is a 2/3-phase synchronous buck controller specifically designed to power Intel(R)/ AMD next generation microprocessors. It implements an internal 8-bit DAC that is identified by VID code of microprocessor directly. RT8803A generates VID table that conform to Intel(R) VRD10.x and VRD11 core power with 6.25mV increments and 0.5% accuracy. RT8803A adopts innovative time-sharing DCR current sensing technique to sense phase currents for phase current balance, load line setting and over current protection. Using a common GM to sense all phase currents eliminates offset and linearity variation between GMs in conventional current sensing methods. As sub-milli-ohm-grade inductors are widely used in modern motherboards, slight offset and linearity mismatch will cause considerable current shift between phases. This technique ensures good current balance at mass production. Other features include over current protection, programmable soft start, over voltage protection, and output offset setting. RT8803A comes to a small footprint package with VQFN-32L 5x5.
Features
5V Power Supply 2/3-Phase Power Conversion with Automatic Phase Selection 8-bit VID Interface, Supporting Intel VRD11/VRD10.x and AMD K8, K8_M2 CPUs VR_HOT and VR_FAN Indication Precision Core Voltage Regulation Power Stage Thermal Balance by DCR Current Sensing Adjustable Soft-start Over-Voltage Protection Adjustable Frequency and Typical at 300kHz per Phase Power Good Indication 32-Lead VQFN Package RoHS Compliant and 100% Lead (Pb)-Free
Applications
Intel(R)/AMD New generation microprocessor for Desktop PC and Motherboard Low Output Voltage, High power density DC-DC Converters Voltage Regulator Modules
Ordering Information
RT8803A Package Type QV : VQFN-32L 5x5 (V-Type) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard)
Pin Configurations
(TOP VIEW)
VID_SEL VID0 VID1 VID2 VID3 VID4
27
VID5
26
Note : Richtek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating.
32
31
30
29
28
25 24 23 22
VTT/EN VR_Ready FBRTN FB COMP SS VR_FAN VR_HOT
VID6
21 20 19
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 33
GND
VID7 VDD PWM3 PWM2 PWM1 ISP1 ISP2 ISP3
18 17
TSEN
IMAX
DVD
RT
OFS
ADJ
VQFN-32L 5x5
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ISN23
ISN1
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VIN BTX_12V BTX_12V R33 1200uF 4.7uF R27 10 1N4148 C16 1uF Q1 IPD09N03LA Q2 IPS06N03LA Q3 L1 280nH RT2 NTC 2k C5 5.6pF R17 0 CPU_VCC C11 0.1uF R28 2.2 C17 3.3nF R15 C6 15k 2.2nF R16 1.5k C4 56nF C7 470pF 4.7uF C15 4.7uF C12 C13 C14 VCORE1 6 5 4 20 21
FB
RT8803A
R13 R14 12k 8.2k
Typical Application Circuit
C3 56nF
R11 300
For AMD R19 100 BTX_12V C20 4.7uF C21 360 VCORE23 R29 10 1N4148 C23 1uF IPD09N03LA Q5 IPS06N03LA Q6 75k 360 VCORE1 1200uF 4.7uF VIN C19 C22 4.7uF
R12 300
BTX_5V
COMP PWM1 PWM2
13 11 14 R18 75k PWM3 22 ISN23 ISN1 15 R22 ISP1 19 18 ISP2 ISP3 17
TSEN OFS
1 BOOT 3 8 NC UGATE 7 4 VCC PHASE RT9619 5 LGATE 2 PWM PGND 6
SS
RT
ADJ
IMAX
For Intel
VID_SEL 16 R21 R20
VDDIO
For K8
RT8803A
GND
VCORE23 VCC Q4 L2 280nH
VSS
For K8_M2
GND
VID0 VID1 VID2 VID3 VID4 VID5 VID6
VID7 C18 0.1uF
BTX_5V BTX_5V R7 C8 1uF R23 360 R31 10 R24 360 R26 360 BTX_12V C92 1uF C10 1uF R25 NC
R1 10
FBRTN
32 31 30 29 28 27 26 25 24 23 10
VID_SEL VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7 VDD DVD
C32 to C41 560uF x 10 R30 2.2 C24 3.3nF C42 to C59 10uF x 18
VR_FAN
VR_Ready
VR_HOT
VTT/EN
C1 0.1uF 3 12 9 C2 0.1uF
1
8
7
2
BTX_12V
R2 10k
1 BOOT 3 8 NC UGATE 7 4 VCC PHASE RT9619 5 LGATE 2 VIN PGND 6 VIN
Enable
R3 1.1k
C26
C27 1200uF 4.7uF 1N4148
C28 4.7uF
C29 4.7uF
For Intel
VTT
For AMD
R4 R5 R6 10k 10k 10k
VCORE23 C30 1uF IPD09N03LA Q7 L3 280nH
VDDIO R8 NC BTX_5V R9 NC C25 0.1uF
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Q8 IPS06N03LA Q9 1 BOOT 3 8 NC UGATE 7 4 VCC PHASE RT9619 5 LGATE 2 VIN PGND 6 R32 2.2 C31 3.3nF RT1 10k NTC R10 0 CPU_VSS
PGOOD
DS8803A-05 August 2007
RT8803A
Functional Pin Description
OFS (Pin 12) VTT/EN (Pin 1) The pin is defined as the chip enable, and the VTT is applied for internal VID pull high power and power sequence monitoring. VR_Ready (Pin 2) Power good open-drain output. FBRTN (Pin 3) Feedback return pin. VID DAC and error amplifier reference for remote sensing of the output voltage. FB (Pin 4) Inverting input pin of the internal error amplifier. COMP (Pin 5) Output pin of the error amplifier and input pin of the PWM comparator. SS (Pin 6) Connect this SS pin to GND with a capacitor to set the soft-start time interval. VR_FAN (Pin 7) The pin is defined to signal VR thermal information for external VR thermal dissipation scheme triggering. VR_HOT (Pin 8) The pin is defined to signal VR thermal information for external VR thermal dissipation scheme triggering. TSEN (Pin 9) Temperature detect pin for VR_HOT and VR_FAN. DVD (Pin 10) Programmable power UVLO detection input. Trip threshold is 1V at VDVD rising. RT (Pin 11) The pin is defined to set internal switching operation frequency. Connect this pin to GND with a resistor RRT to set the frequency FSW.
FSW = 4.463 e 9 RRT + 3500
The pin is defined for load line offset setting. ADJ (Pin 13) Current sense output for active droop adjusting. Connect a resistor from this pin to GND to set the load droop. IMAX (Pin 14) The pin is defined to set threshold of over current. ISN1 (Pin 15) Current sense negative input pin for channel 1 current sensing. ISN23 (Pin 16) Current sense negative input pins for channel 2 and channel 4 current sensing. ISP1 (Pin 19), ISP2 (Pin 18), ISP3 (Pin 17) Current sense positive input pins for individual converter channel current sensing. PWM1 (Pin 20), PWM2 (Pin 21), PWM3 (Pin 22) PWM outputs for each driven channel. Connect these pins to the PWM input of the MOSFET driver. For systems which using 2/3/4 channels, pull PWM 3/4/5 pins up to high. VDD (Pin 23) IC power supply. Connect this pin to a 5V supply. VID7 (Pin 24), VID6 (Pin 25), VID5 (Pin 26), VID4 (Pin 27), VID3 (Pin 28), VID2 (Pin 29), VID1 (Pin 30), VID0 (Pin 31), VID_SEL (32) DAC voltage identification inputs for VRD10.x / VRD11 / K8 / K8_M2 . These pins are internally pulled up to VTT.
VIDSEL VTT GND VDD VDD VID [7] X X NC GND Table VR11 VR10.x K8 K8_M2
GND [Exposed pad (33)] The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.
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RT8803A
Function Block Diagram
VDD VTT/EN DVD
SS VR_Ready COMP FB OFS
Soft Start & PGOOD
Power On Reset
Oscillator & Ramp Generator
RT
DAC
Clamp
TSEN VR_FAN VR_HOT
Temperature Processing
Droop Tune & Hi-I Detection
Sample & Hold
Mux
ADJ
GND
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+
CSA
-
FBRTN
+
-
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VID_SEL
EA
Current Processing SUM/N & OCP Detection
Pulse Width Modulator & Output Buffer
PWM1 PWM2 PWM3 IMAX Mux ISN1 ISN23 ISP1 Mux ISP2 ISP3
RT8803A
Table 1. Output Voltage Program (VRD10.x + VID6)
Pin Name VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VID2 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 VID1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 VID0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 VID5 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 VID6 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1.60000V 1.59375V 1.58750V 1.58125V 1.57500V 1.56875V 1.56250V 1.55625V 1.55000V 1.54375V 1.53750V 1.53125V 1.52500V 1.51875V 1.51250V 1.50625V 1.50000V 1.49375V 1.48750V 1.48125V 1.47500V 1.46875V 1.46250V 1.45625V 1.45000V 1.44375V 1.43750V 1.43125V 1.42500V 1.41875V 1.41250V 1.40625V 1.40000V 1.39375V 1.38750V 1.38125V 1.37500V 1.36875V 1.36250V Nominal Output Voltage DACOUT
To be continued
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RT8803A
Table 1. Output Voltage Program (VRD10.x + VID6)
Pin Name VID4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VID1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 VID0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VID5 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VID6 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1.35625V 1.35000V 1.34375V 1.33750V 1.33125V 1.32500V 1.31875V 1.31250V 1.30625V 1.30000V 1.29375V 1.28750V 1.28125V 1.27500V 1.26875V 1.26250V 1.25625V 1.25000V 1.24375V 1.23750V 1.23125V 1.22500V 1.21875V 1.21250V 1.20625V 1.20000V 1.19375V 1.18750V 1.18125V 1.17500V 1.16875V 1.16250V 1,15625V 1.15000V 1.14375V 1.13750V 1.13125V 1.12500V 1.11875V Nominal Output Voltage DACOUT
To be continued
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RT8803A
Table 1. Output Voltage Program (VRD10.x + VID6)
Pin Name VID4 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VID2 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 VID0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 VID5 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 VID6 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1.11250V 1.10625V 1.10000V 1.09375V OFF OFF OFF OFF 1.08750V 1.08125V 1.07500V 1.06875V 1.06250V 1.05625V 1.05000V 1.04375V 1.03750V 1.03125V 1.02500V 1.01875V 1.01250V 1.00625V 1.00000V 0.99375V 0.98750V 0.98125V 0.97500V 0.96875V 0.96250V 0.95625V 0.95000V 0.94375V 0.93750V 0.93125V 0.92500V 0.91875V 0.91250V 0.90625V 0.90000V Nominal Output Voltage DACOUT
To be continued
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RT8803A
Table 1. Output Voltage Program (VRD10.x + VID6)
Pin Name VID4 0 0 0 0 0 0 0 0 0 0 0 VID3 0 1 1 1 1 1 1 1 1 1 1 VID2 1 0 0 0 0 0 0 0 0 0 0 VID1 1 0 0 0 0 0 0 0 0 1 1 VID0 1 0 0 0 0 1 1 1 1 0 0 VID5 1 0 0 1 1 0 0 1 1 0 0 VID6 0 1 0 1 0 1 0 1 0 1 0 0.89375V 0.88750V 0.88125V 0.87500V 0.86875V 0.86250V 0.85625V 0.85000V 0.84375V 0.83750V 0.83125V Nominal Output Voltage DACOUT
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RT8803A
Table 2. Output Voltage Program (VRD11)
Pin Name HEX 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 Nominal Output Voltage DACOUT OFF OFF 1.60000V 1.59375V 1.58750V 1.58125V 1.57500V 1.56875V 1.56250V 1.55625V 1.55000V 1.54375V 1.53750V 1.53125V 1.52500V 1.51875V 1.51250V 1.50625V 1.50000V 1.49375V 1.48750V 1.48125V 1.47500V 1.46875V 1.46250V 1.45625V 1.45000V 1.44375V 1.43750V 1.43125V 1.42500V 1.41875V 1.41250V 1.40625V 1.40000V 1.39375V 1.38750V 1.38125V 1.37500V
Pin Name HEX 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D
Nominal Output Voltage DACOUT 1.36875V 1.36250V 1.35625V 1.35000V 1.34375V 1.33750V 1.33125V 1.32500V 1.31875V 1.31250V 1.30625V 1.30000V 1.29375V 1.28750V 1.28125V 1.27500V 1.26875V 1.26250V 1.25625V 1.25000V 1.24375V 1.23750V 1.23125V 1.22500V 1.21875V 1.21250V 1.20625V 1.20000V 1.19375V 1.18750V 1.18125V 1.17500V 1.16875V 1.16250V 1.15625V 1.15000V 1.14375V 1.13750V 1.13125V
To be continued
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RT8803A
Table 2. Output Voltage Program (VRD11)
Pin Name HEX 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 Nominal Output Voltage DACOUT 1.12500V 1.11875V 1.11250V 1.10625V 1.10000V 1.09375V 1.08750V 1.08125V 1.07500V 1.06875V 1.06250V 1.05625V 1.05000V 1.04375V 1.03750V 1.03125V 1.02500V 1.01875V 1.01250V 1.00625V 1.00000V 0.99375V 0.98750V 0.98125V 0.97500V 0.96875V 0.96250V 0.95625V 0.95000V 0.94375V 0.93750V 0.93125V 0.92500V 0.91875V 0.91250V 0.90625V 0.90000V 0.89375V 0.88750V Pin Name HEX 75 76 77 78 79 7A 7B 7C 7D 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 95 96 97 98 99 9A 9B Nominal Output Voltage DACOUT 0.88125V 0.87500V 0.86875V 0.86250V 0.85625V 0.85000V 0.84375V 0.83750V 0.83125V 0.82500V 0.81875V 0.81250V 0.80625V 0.80000V 0.79375V 0.78750V 0.78125V 0.77500V 0.76875V 0.76250V 0.75625V 0.75000V 0.74375V 0.73750V 0.73125V 0.72500V 0.71875V 0.71250V 0.70625V 0.70000V 0.69375V 0.68750V 0.68125V 0.67500V 0.66875V 0.66250V 0.65625V 0.65000V 0.64375V
To be continued
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RT8803A
Table 2. Output Voltage Program (VRD11)
Pin Name HEX 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF C0 C1 C2 Nominal Output Voltage DACOUT 0.63750V 0.63125V 0.62500V 0.61875V 0.61250V 0.60625V 0.60000V 0.59375V 0.58750V 0.58125V 0.57500V 0.56875V 0.56250V 0.55625V 0.55000V 0.54375V 0.53750V 0.53125V 0.52500V 0.51875V 0.51250V 0.50625V 0.50000V X X X X X X X X X X X X X X X X Pin Name HEX C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 Nominal Output Voltage DACOUT X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
To be continued
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RT8803A
Table 2. Output Voltage Program (VRD11)
Pin Name HEX EA EB EC ED EE EF F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF
Note: (1) 0 : Connected to GND (2) 1 : Open (3) X : Don't Care
Nominal Output Voltage DACOUT X X X X X X X X X X X X X X X X X X X X OFF OFF
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RT8803A
Table 3. Output Voltage Program (K8)
VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VID2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VID1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VID0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Nominal Output Voltage DACOUT 1.550 1.525 1.500 1.475 1.450 1.425 1.400 1.375 1.350 1.325 1.200 1.275 1.250 1.225 1.200 1.175 1.150 1.125 1.100 1.075 1.050 1.025 1.000 0.975 0.950 0.925 0.900 0.875 0.850 0.825 0.800 Shutdown
Note: (1) 0 : Connected to GND (2) 1 : Open
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RT8803A
Table 4. Output Voltage Program (K8_M2)
Pin Name VID5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 VID3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 VID2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 VID1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VID0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1.5500 1.5250 1.5000 1.4750 1.4500 1.4250 1.4000 1.3750 1.3500 1.3250 1.3000 1.2750 1.2500 1.2250 1.2000 1.1750 1.1500 1.1250 1.1000 1.0750 1.0500 1.0250 1.0000 0.9750 0.9500 0.9250 0.9000 0.8750 0.8500 0.8250 0.8000 0.7750 0.7625 0.7500 Nominal Output Voltage DACOUT
To be continued
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RT8803A
Table 4. Output Voltage Program (K8_M2)
Pin Name VID5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VID2 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VID0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Nominal Output Voltage DACOUT 0.7375 0.7250 0.7125 0.7000 0.6875 0.6750 0.6625 0.6500 0.6375 0.6250 0.6125 0.6000 0.5875 0.5750 0.5625 0.5500 0.5375 0.5250 0.5125 0.5000 0.4875 0.4750 0.4625 0.4500 0.4375 0.4250 0.4125 0.4000 0.3875 0.3750
Note: (1) 0 : Connected to GND (2) 1 : Open (3) The voltage above are load independent for desktop and server platforms. For mobile platforms the voltage above correspond to zero load current.
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RT8803A
Absolute Maximum Ratings
(Note 1) Supply Voltage, VDD ------------------------------------------------------------------------------------------- 7V Input, Output or I/O Voltage ---------------------------------------------------------------------------------- GND-0.3V to VDD+0.3V Power Dissipation, PD @ TA = 25C VQFN-32L 5x5 -------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 4) VQFN-32L 5x5, JA --------------------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------ESD Susceptibility (Note 2) HBM (Human Body Mode) ----------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------2.778W 36C/W 150C 260C -65C to 150C 2kV 200V
Recommended Operating Conditions
(Note 3)
Supply Voltage, VDD ------------------------------------------------------------------------------------------- 5V 10% Junction Temperature Range --------------------------------------------------------------------------------- -40C to 125C Ambient Temperature Range --------------------------------------------------------------------------------- -40C to 85C
Electrical Characteristics
(VDD = 5V, TA = 25C, unless otherwise specified)
Parameter V DD Supply Current Nominal Supply Current Power-On Reset POR Threshold Hysteresis VDVD T hreshold Trip (Low to High) Hysteresis Trip (Low to High) Hysteresis
Symbol
Test Conditions
Min
Typ
Max
Units
IDD
PWM 1,2,3 Open
--
12
16
mA
VDDRTH VDDHYS VDVDTH VDVDHYS VTTTH VTTHYS
VDD Rising
4.0 0.2
4.2 0.5 1.0 60 0.85 0.1
4.5 -1.1 -0.95 --
V V V mV V
Enable
0.9 --
VTT T hreshold Oscillator
Enable
0.75 --
Free Running Frequency Frequency Adjustable Range Ramp Amplitude Ramp Valley Maximum On-Time of Each Channel RT Pin Voltage
fOSC fOSC_ADJ VOSC VRV
RRT = 20k
180 50
200 -1.9 1.0 67 1.0
220 400 --72 1.1
kHz kHz V V % V
RRT = 20k
-0.7
Three Phase Operation VRT RRT = 20k
62 0.9
To be continued
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RT8803A
Parameter Reference and DAC VDAC 1V DACOUT Voltage Accuracy VDAC 1V VDAC 0.8V VDAC < 0.8V DAC (VID0-VID125) Input Low DAC (VID0-VID125) Input High VID Pull-up Resistance OFS Pin Voltage Error Amplifier DC Gain Gain-Bandwidth Product Slew Rate Current Sense GM Amplifier CSN Full Scale Source Current CSN Current for OCP Protection Over-Voltage Trip (FB-DACOUT) IMAX Voltage Power Good Output Low Voltage VPGOODL IPGOOD = 4mA --0.2 V OVT VIMAX RIMAX = 20k 100 0.9 150 1.0 200 1.1 mV V IISPFSS 100 150 ----A A GBW SR COMP = 10pF ---65 10 8 ---dB MHz V/s VOFS ROFS = 100k VILDAC VIHDAC -0.5 -5 -8 -1/2VTT + 0.2 12 0.9 -----15 1.0 +0.5 +5 +8 1/2VTT - 0.2 -18 1.1 % mV mV V V k V Symbol Test Conditions Min Typ Max Units
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. JA is measured in the natural convection at T A = 25C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard.
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RT8803A
Typical Operating Characteristics
Frequency vs. RRT
700 600
GM
450 400 350
Frequency (kHz)
500 400 300 200 100 0 0 10 20 30 40 50 60 70 80 90 100
Positive Duty (ns)
300 250 200 150 100 50 0 0 25 50 75 100 125 150 175 200
PHASE 3 PHASE 1 PHASE 2
(k) RRT (k )
ISN (uA)
Output Voltage vs. Temperature
1.264 1.262
322 320 318
Frequency vs. Temperature
Output Voltage (V)
1.26
Frequency (kHz)
-20 0 20 40 60 80 100
1.258 1.256 1.254 1.252 1.25 1.248
316 314 312 310 308 306 304 -20 0 20 40 60 80 100
Temperature (C)
Temperature (C)
Power On from DVD
Power Off from DVD
DVD (1V/Div) SS (1V/Div) VOUT (1V/Div) PHASE 3 (10V/Div) Time (1ms/Div)
DVD (1V/Div) SS (1V/Div) VOUT (1V/Div) PHASE 3 (10V/Div) Time (1s/Div)
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RT8803A
Power On from VCC12 Power Off from VCC12
VCC12 (10V/Div) SS (1V/Div) VOUT (1V/Div) PHASE 3 (10V/Div) Time (1ms/Div)
VCC12 (10V/Div) SS (1V/Div) VOUT (1V/Div) PHASE 3 (10V/Div) Time (1ms/Div)
Power On from VCC5
Power Off from VCC5
VCC5 (5V/Div) SS (1V/Div) VOUT (1V/Div) PHASE 3 (10V/Div) Time (1ms/Div)
VCC5 (5V/Div) SS (1V/Div) VOUT (1V/Div) PHASE 3 (10V/Div) Time (25ms/Div)
Power On with OCP
VR_Ready (1V/Div) VR_Ready (1V/Div) SS (2V/Div) VOUT 1V/Div) PWM (5V/Div) Time (500s/Div) SS (2V/Div) VOUT (1V/Div) PWM (5V/Div)
Output Short Circuit
Time (1ms/Div)
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RT8803A
VOUT Droop VOUT Overshoot
VOUT (20mV/Div)
VOUT (20mV/Div)
IOUT (40A/Div) Time (2s/Div)
IOUT (40A/Div) Time (2s/Div)
Dynamic VID
VOUT (200mV/Div)
Dynamic VID
VOUT (200mV/Div)
VID0 (500mV/Div)
VID0 (500mV/Div) Time (50s/Div) Time (50s/Div)
OVP
VR_Ready (1V/Div) SS (2V/Div) FB (1V/Div) PWM (5V/Div) Time (10s/Div)
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RT8803A
Applications Information
RT8803A is a multi-phase DC/DC controller specifically designed to deliver high quality power for next generation CPU. RT8803A controls a special power-on sequence & monitors the thermal condition of VR module to meet the VRD11 requirement. Phase currents are sensed by innovative time-sharing DCR current sensing technique for channel current balance, droop tuning, and over current protection. Using one common GM amplifier for current sensing eliminates offset errors and linearity variation between GMs. As sub-milli-ohm-grade inductors are widely used in modern mother boards, slight mismatch of GM amplifiers offset and linearity results in considerable current shift between phases. The time-sharing DCR current sensing technique is extremely important to guarantee phase current balance in mass production. Converter Initialization, Phase Selection, and Power Good Function The RT8803A initiates only after 3 pins are ready: VDD pin power on reset (POR), VTT/EN pin enabled, and DVD pin is higher than 1V. VDD POR is to make sure RT8803A is powered by a voltage for normal work. The rising threshold voltage of VDD POR is 4.2V typically. At VDD POR, RT8803A checks PWM3, PWM4 and PWM5 status to determine phase number of operation. Pull high PWM3 for two-phase operation; pull high PWM4 for three-phase operation; pull high PWM5 for four-phase operation. The unused current sense pins should be connected to GND or left floating. VTT/EN acts as a chip enable pin and receives signal from FSB or other power management IC. DVD is to make sure that ATX12V is ready for drivers to work normally. Connect a voltage divider from ATX12V to DVD pin as shown in the Typical Application Circuit. Make sure that DVD pin voltage is below its threshold voltage before drivers are ready and above its threshold voltage for minimum ATX12V during normal operation. If any one of VDD, VTT/EN, and DVD is not ready, RT8803A keeps its PWM outputs high impedance and the companion drivers turn off both upper and lower MOSFETs. After VDD, VTT/EN, and DVD are ready, RT8803A initiates its soft start cycle that is compliant
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with Intel(R)VRD11 specification as shown in Figure 1. A time-variant internal current source charges the capacitor connected to SS pin. SS voltage ramps up piecewise linearly and locks VID_DAC output with a specified voltage drop. Consequently, VCORE is built up according to VID_DAC output and meet Intel(R) VRD11 requirement. VR_READY output is pulled high by external resistor when VCORE reaches VID_DAC output with 1~2ms delay. An SS capacitor about 47nF is recommend for VRD11 compliance.
VDD POR, DVD, and VTT/EN ready SS VCORE 1.1V VR_Ready
VID on the fly 1~2ms 1~2ms 1~2ms 1~2ms 1~2ms
Figure 1. Timming Diagram During Soft Start Interval Voltage Control CPU VCORE voltage is Kelvin sensed by FB and FBRTN pins and precisely regulated to VID_DAC output by internal high gain Error Amplifier (EA). The sensed signal is also used for power good and over voltage function. The typical OVP trip point is 170mV above VID_DAC output. RT8803A pulls PWM outputs low and latches up upon OVP trip to prevent damaging the CPU. It can only restart by resetting one of VDD, DVD, or VTT/EN pin. RT8803A supports Intel VRD10.x, VRD11, AMD K8 and AMD K8_M2 VID specification. The change of VID_DAC output at VID on the fly is also smoothed by capacitor connected to SS pin. Consequently, Vcore shifts to its new position smoothly as shown in Figure 2.
RT8803A
PWM3 V CORE
VID7
Figure 2. Vcore Response at VID on the Fly DCR Current Sensing RT8803A adopts an innovative time-sharing DCR current sensing technique to sense the phase currents for phase current balance (phase thermal balance) and load line regulation as shown in Figure 3. Current sensing amplifier GM samples and holds voltages VCx across the current sensing capacitor Cx by turns in a switching cycle. According to the Basic Circuit Theory, if
Consequently, the sensing current IX is proportional to inductor current ILX and is expressed as : I x DCRx I X = LX R CSNX The sensed current IX is used for current balance and droop tuning as described as followed. Since all phases share one common GM, GM offset and linearity variation effect is eliminated in practical applications. As sub-milli-ohmgrade inductors are widely used in modern mother boards, slight mismatch of GM amplifiers offset and linearity results in considerable current shift between phases. The timesharing DCR current sensing technical is extremely important to guarantee phase current balance in mass production. Phase Current Balance The sampled and held phase current IX are summed and averaged to get the averaged current IX . Each phase current IX then is compared with the averaged current. The difference between I X and IX is injected to corresponding PWM comparator. If phase current IX is smaller than the averaged current , RT8803A increases the duty cycle of corresponding phase to increase the phase current accordingly and vice versa.
Lx = Rx x Cx then VCx = I x DCRx LX DCRx
T1 T2 T3 IX = ILX x DCRX/RCSNX IX S/H CKT
+ CSA -
L1
DCR1
R1 ISP1 T1 ISN1 T1 ISP3 T3 T3 ISN23
C1 + VC1 -
L3
DCR3
R3 RCSN1
C3 + VC3 -
CSA: Current Sense Amplifier
RCSN3 L2 DCR2
R2 ISP2 T2 T2 ISN23
C2 + VC2 -
RCSN2
Figure 3
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RT8803A
IOFS 4
If
LX = (R X //RPX ) x Cx then DCRx VCx = RPX x ILX x DCRx Rx + RPX
VCORE
RFB1
+
EA
COMP
VADJ DAC
+ -
4IX
RADJ
With other phase kept unchanged, this phase would share (RPX+Rx)/RPX times current than other phases. Figure 6 and 7 show different current ratio setting for the power stage when Phase 3 is programmed 2 times current than other phases. Figure 8 and 9 compare the above current ratio setting results.
LX DCRx + VCx ILX
Figure 4. Load Line and Offset Function Output Voltage Offset Function To meet Intel requirement of initial offset of load line, RT8803A provides programmable initial offset function. External resistor ROFS and voltage source at OFS pin V generate offset current IOFS = OFS R OFS , where VOFS is 1V typical. One quarter of IOFS flows through RFB1 as shown in Figure 4. Error amplifier would hold the inverting pin equal to VDAC - VADJ. Thus output voltage is subtracted from VDAC - VADJ for a constant offset voltage. RFB1 VCORE = VDAC - VADJ - 4 x R OFS A positive output voltage offset is possible by connecting ROFS to VDD instead of to GND. Please note that when ROFS is connected to VDD, VOFS is VDD - 2V typically and half of IOFS flows through RFB1. VCORE is rewritten as : VCORE = VDAC - VADJ + Current Ratio Setting Current ratio adjustment is possible as described below. It is important for achieving thermal balance in practical application where thermal conditions between phases are not identical. Figure 5 shows the application circuit of GM for current ratio requirement. According to Basic Circuit Theory RPX Rx + RPX VCx = x ILX x DCRx SRx x RPX x Cx +1 Rx + RPX Figure 6. GM3 Setting for current ratio function RFB1 R OFS
(R)
Rx
Cx RPX
VOUT
+
T
Figure 5
Figure 7. GM1~2 Setting for current ratio function
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RT8803A
Current Ratio Function
35 30 25
Load Line without dead zone at light loads
1.31
IL3
1.3 1.29
w/o Dead Zone Compensation RCSN open
I L (A)
20 15 10
IL2 IL1
V CORE (V)
1.28 1.27 1.26 1.25
RCSN2 = 82k w/i Dead Zone Compensation
5 0 0 15 30 45 60 75 90
1.24 1.23 0 5 10 15 20 25
I OUT (A)
I OUT (A)
Figure 8
Figure 10
Lx
Current Balance Function
35 30
ILX
DCRx Cx + VCx VOUT
Rx
25
I L (A)
20 15 10 5 0 0 20 40
IL3
GMx
+ RCSN RCSN2
IL2 IL1
Ix
Figure 11. Application circuit of GM
60 80 100 120
I OUT (A)
Referring to Figure 11, IX is expressed as :
IX = ILX_66% x DCRx ILX_66% x DCRx VOUT + + R CSN2 R CSN2 R CSN
Figure 9 Dead Zone Elimination RT8803A samples and holds inductor current at 50% period by time-sharing sourcing a current IX to RCSN. At light load condition when inductor current is not balance, voltage VCx across the sensing capacitor would be negative. It needs a negative IX to sense the voltage. However, RT8803A CANNOT provide a negative IX and consequently cannot sense negative inductor current. This results in dead zone of load line performance as shown in Figure 10. Therefore a technique as shown in Figure 11 is required to eliminate the dead zone of load line at light load condition.
(1)
where ILX_50% is the of inductor current at 50% period. To make sure RT8803A could sense the inductor current, right hand side of Equation (1) should always be positive:
ILX_66% x DCRx ILX_66% x DCRx VOUT + + 0 R CSN2 R CSN2 R CSN
(2)
Since RCSN >> DCRx in practical application, Equation (2) could be simplified as :
ILX_66% x DCRx VOUT R CSN2 R CSN
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RT8803A
For example, assuming the negative inductor current is ILX_50% = -5A at no load, then for RCSN 330, RADJ = 160, VOUT = 1.300V If RADJ is connected as in Figure 14, RADJ = R1 + (R2// R NTC), which is a negative temperature correlated resistance. By properly selecting R1 and R2, the positive temperature coefficient of DCR can be canceled by the negative temperature coefficient of RADJ. Thus the load line will be thermally compensated.
ADJ
1.3V - 5A x 1m R CSN2 330
RCSN2 85.8k Choose RCSN2 = 82k Figure 10 shows that dead zone of load line at light load is eliminated by applying this technique. VR_HOT & VR_FAN Setting
VCC 5V
R1 RADJ RNTC R2
Figure 14. RADJ Connection for Thernal Compensation
R1 TSEN VTSEN 0.33 x VCC RNTC 0.28 x VCC 0.39 x VCC + CMP + CMP + CMP Q1
Over Current Protection
Phase current OCP RT8803A uses an external resistor RIMAX connected to IMAX pin to generate a reference current IIMAX for over current protection : V IIMAX = IMAX RIMAX where VIMAX is typical 1.0V . OCP comparator compares each sensed phase current IX with this reference current as shown in Figure 15. Equivalently, the maximum phase current ILX(MAX) is calculated as below:
1 1I X(MAX) = IIMAX 2 3 V I X(MAX) = 3 IIMAX = 3 x IMAX 2 RIMAX 2 R R V ILX(MAX) = I X x CSNX = 3 x IMAX x CSNX RLX RIMAX 2 DCR X
OCP Comparator
Q2
Q3
Figure 12
VTSEN
VTSEN is inversely proportional to Temperature.
0.39 x VCC 0.33 x VCC 0.28 x VCC
VR_FAN
VR_HOT
Temperature
Figure 13. VR_HOT and VR_FAN Signal vs TSEN Voltage Load Line Setting and Thermal Compensation VADJ = Sum(IX) x RADJ = (DCR x RADJ / RCSN) x IOUT = LL x IOUT VOUT = VDAC - VADJ = VDAC - LL x IOUT LL = DCR(PTC) x RADJ(NTC) / RCSN DCR is the inductor DCR which is a PTC resistance.
+ -
1/3 IX 1/2 IIMAX
Figure 15. Over Current Comparator
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RT8803A
Error Amplifier Characteristic For fast response of converter to meet stringent output current transient response, RT8803A provides large slew rate capability and high gain-bandwidth performance.
B 4.7k 4.7k
EA +
A
VREF
EA Falling Slew Rate
Figure 18. Gain-Bandwidth Measurement by signal A divided by signal B Design Procedure Suggestion
VFB
a. Output filter pole and zero (Inductor, output capacitor value & ESR). b. Error amplifier compensation & saw-tooth wave amplitude (compensation network).
VCOMP
CH1:(500mV/Div) CH2:(2V/Div)
c. Kelvin sense for VCORE. Current Loop Setting
Time (250ns/Div)
Figure 16. EA Rising Transient with 10pF Loading ; Slew Rate = 10V/s
a. GM amplifier S/H current (current sense component DCR, ISPX and ISNX pin external resistor value). b. Over-current protection trip point (RIMAX resistor). VRM Load Line Setting a. Droop amplitude (ADJ pin resistor).
EA Rising Slew Rate
VFB
b. No load offset (RCSN) c. DAC offset voltage setting (OFS pin & compensation network resistor). d. Temperature coefficient compensation(TSEN external resister & thermistor, resistor between ADJ and GND.) Power Sequence & SS
VCOMP
CH1:(500mV/Div) CH2:(2V/Div)
DVD pin external resistor and SS pin capacitor. PCB Layout
Time (250ns/Div)
a.Kelvin sense for current sense GM amplifier input. b.Refer to layout guide for other items.
Figure 17. EA Falling Transient with 10pF Loading ; Slew Rate = 8V/s
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RT8803A
Outline Dimension
D
D2
SEE DETAIL A L
1
E
E2
e
b
1 2
1 2
A A1 A3
DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated.
Symbol A A1 A3 b D D2 E E2 e L
Dimensions In Millimeters Min 0.800 0.000 0.175 0.180 4.950 3.400 4.950 3.400 0.500 0.350 0.450 Max 1.000 0.050 0.250 0.300 5.050 3.750 5.050 3.750
Dimensions In Inches Min 0.031 0.000 0.007 0.007 0.195 0.134 0.195 0.134 0.020 0.014 0.018 Max 0.039 0.002 0.010 0.012 0.199 0.148 0.199 0.148
V-Type 32L QFN 5x5 Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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